Dr. Amine Marref

I'm

About

This webpage is a summary of my academic work. For information about my entrepreneurial work, visit the website marref.org

Around the World

My academic journey was rather exotic. After finishing my primary and secondary education in Algeria, I joined the Department of Computer Science at the University of York, U.K., where I obtained my M.Eng. and then my Ph.D. in Real-Time Systems.

Saudi Arabia was my following stop where I joined the Department of Computer Science at Umm Al-Qura University as an Assistant Professor. Finally, I am back to Algeria where I am an IT entrepreneur.

Saudi Arabia was my following stop where I joined the Department of Computer Science at Umm Al-Qura University as an Assistant Professor.

Finally, I am back to Algeria where I am an IT entrepreneur.

Research

I focused in my research on the timing analysis of real-time systems and my niche has been worst-case execution-time (WCET) analysis. I focused on derving new techniques for dynamic timing analysis; and my latest work involved developing temporal testing techniques to estimate the WCET of parallel embedded applications. The following constitute my active line of research.


  • Hardware modeling of embedded real-time system (RTS) architectures.
  • Program-execution comprehension (in the temporal domain).
  • Dynamic flow analysis of real-time programs, automatic derivation of flow information based on model-checking and machine learning.
  • Non-functional testing based on the notion of WCET coverage.
  • Constraint and linear programming for calculating upper bounds on the WCET.
  • Early timing analysis of RTSs.
  • Timing model identification for WCET analysis based on statistics and evolutionary techniques.
  • Composability of WCET estimates in component-based RTSs.
  • WCET optimisation through code positioning.
  • WCET-analysis methods for parallel real-time systems.
  • Parametric WCET analysis using genetic programming.

Research Projects

LIRA

Description: Logic-Intensive Reconfigurable Architectures (LIRA) and Supporting CAD Tools with budget equalling 2,000,000Saudi Riyals (approximately 540,000 US Dollars) and lasting 24 months (2011-2013, Grant 10-ELE1237-10). This project is sponsored by the National Science, Technology, and Innovation Program (NSTIP), King Abdulaziz City for Science and Technology (KACST), Saudi Arabia.

The project investigates the reduction in power in FPGAs by decreasing the number of SRAM cells via sharing look-up tables between multiple NPN equivalent Boolean functions.


Involvement: I am a co-investigator in this project. My role constitutes of developing the Boolean algebra that enables the partitioning of the function space into equivalence classes, and the analysis of the critical-path timing delays resulting from the sharing of look-up tables.

TIMPA

Description: Timing Analysis of Parallel Real-Time Applications Running on Multi-Core Hardware Architectures (PI) with budget equalling 1,192,600 Saudi Riyals (approximately 320,000 US Dollars) and lasting 24 months. This project is sponsored by the National Science, Technology, and Innovation Program (NSTIP), King Abdulaziz City for Science and Technology (KACST), Saudi Arabia.

The project investigates the use of static and measurement-based analysis methods by which the timing properties of parallelly-executing code are captured, and defines suitable calculation techniques for the worst-case execution time of parallel real-time applications.


Involvement: I am the principal investigator in this project. My role constitutes of developing the analysis algorithms, calculation methods, and the whole testing toolchain.

SIMPA

Description: Simplifying the Development of High Performance Applications on Multi-core Systems (CoI) with budget equalling 1,717,000 Saudi Riyals (approximately 460,000 US Dollars) and lasting 24 months. This project is sponsored by the National Science, Technology, and Innovation Program (NSTIP), King Abdulaziz City for Science and Technology (KACST), Saudi Arabia.

The project investigates the problem of auto-tuning transactional memory for parallel computing systems by deriving techniques and software design methodologies for it, that assist the programmer in building high-performance parallel applications easily.


Involvement: I am a co-investigator in this project. My role constitutes of developing algorithms for performance-aware contention management in transactional memory.

UNDERSTAND

Description: Understanding the Timing Behaviour of Real-Time Systems through Automatic Dynamic Analysis of Multidimensional Execution Traces} (PI) with a budget of 2,000,000 SAR (approximately 540,000 US Dollars) and lasting 24 months. This project is sponsored by the National Science, Technology, and Innovation Program (NSTIP), King Abdulaziz City for Science and Technology (KACST), Saudi Arabia.


Involvement: I am a co-investigator in this project. My role constitutes of developing algorithms for performance-aware contention management in transactional memory.

PROGRESS

Description: PROGRESS (2006-2010) is dedicated to find methods for cost-efficient handling of the increasing complexity of software in computer-based products. Adopting a software-component approach to engineering and re-engineering of embedded software systems, PROGRESS will provide theory, methods, and tools that increase quality and reduce life-cycle costs. Competence in this area is a key strategic issue for industrial sectors, such as the automotive, telecom, and automation industries.

PROGRESS vision is to be a worldwide-recognised centre in software engineering of embedded real-time systems with extensive contacts/exchange with other leading universities and to be the preferred partner for the industry. Research will include theories, methods, and tools for (i) predictable embedded software development from software components and legacy code, (ii) interfacing components with the underlying platform and synthesising platforms from application requirements, and (iii) adopting and applying real-time modelling and analysis techniques across all stages of the component-based design and development chain.


Involvement: I was involved in the project as a postdoc for 12 months (2009-2010). My task was to perform timing analysis of software in a way that is compatible with software-component design principles mainly composability. I devised a composable worst-case execution-time analysis that got integrated in PRIDE the IDE developed during the project to integrate all researched techniques from design to deployment. Refer to the paper "Compositional Timing Analysis" for more information on the technique.

ANNC

Description: Artificial Neural Networks for Modelling Corrosion (ANNC) in SABIC Industrial Sites with budget equalling 88,600 Saudi Riyals (approximately 23,000 US Dollars) and lasting 10 months (2011-2012). This project is sponsored by the Saudi Basic Industries Corporation (SABIC), Saudi Arabia.

The project aims at implementing a completely automatic analysis that dynamically derives program-flow information to use in WCET analysis. Flow information is derived by a combination of test-data generation and parsing of program-execution traces to obtain flow-fact hypotheses which are then fed to a model checker to establish their correctness.


Involvement: I am the principal investigator in this project.

FADCET

Description: Fully-Automatic Derivation of Exact Program-Flow Constraints for a Tighter Worst-Case Execution-Time Analysis (FADCET) with budget equalling 38,000 Saudi Riyals (approximately 10,000 US Dollars) and lasting 10 months (2011-2012). This project is sponsored by the Institute of Scientific Research (ISR), Umm Al-Qura University, Saudi Arabia.

The project investigates the use of artificial neural networks to model corrosion at SABIC industrial sites to allow better understanding of the phenomenon in terms of cause and effects. The main objective of the research is to use model-identification techniques to devise mapping between environmental factors and corrosion rate in order to identify the factors that contribute more to corrosion so that necessary action such as prevention measures can be carried out.


Involvement: I am the principal investigator in this project.

ETAAMI

Description: Early Timing Analysis via Instruction Type-Aware Model Identification with budget equalling 38,000 Saudi Riyals (approximately 10,000 US Dollars) and lasting 10 months (2011-2012). This project is sponsored by the Institute of Scientific Research (ISR), Umm Al-Qura University, Saudi Arabia.

The project investigates analysis techniques that will enable the developer to derive early timing estimates of real-time software analysis and be constantly aware about the timing requirements of the real-time software throughout the development cycle. In particular the project investigates the use of evolutionary techniques in model identification to obtain an instruction to execution-time mapping to be fed back to the source code to be used in early timing analysis.


Involvement: I am the principal investigator in this project.

Research Publications

  • Evolutionary Computation Techniques for Predicting Atmospheric Corrosion. Amine Marref, Saleh Basalamah, Rami Al-Ghamdi. International Journal of Corrosion, Volume 2013, January 2013.
  • Evolutionary Techniques for Parametric WCET Analysis. Amine Marref. In proceedings of the 12th International Workshop on Worst-Case Execution Time (WCET) Analysis, July 2012, Pisa, Italy.
  • Fully-Automatic Derivation of Exact Program-Flow Constraints for a Tighter Worst-Case Execution-Time Analysis. Amine Marref. In Proceedings of the 11th IEEE International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation (SAMOS XI), July 2011, Greece, IEEE.
  • WCET Analysis of Component-Based Systems using Timing Traces. Adam Betts and Amine Marref. In Proceedings of the 16th IEEE International Conference on Engineering of Complex Computer Systems (ICECCS 2011), April 2011, Las Vegas, USA, IEEE.
  • Memory Positioning of Real-Time Code for Smaller Worst-Case Execution Times. Amine Marref, Adam Betts. In Proceedings of the 16th IEEE International Conference on Engineering of Complex Computer Systems (ICECCS 2011), April 2011, Las Vegas, USA, IEEE.
  • Accurate Measurement-Based WCET Analysis in the Absence of Source and Binary Code. Amine Marref, Adam Betts. In Proceedings of the 14th IEEE International Symposium on Object/Component/Service-oriented Real-time Distributed Computing (ISORC 2011), March 2011, Newport Beach, CA, USA, IEEE.
  • Hierarchical Composition of Parametric WCET in a Component Based Approach. Thomas Leveque, Etienne Borde, Amine Marref, and Jan Carlson. In Proceedings of the 14th IEEE International Symposium on Object/Component/Service oriented Real-time Distributed Computing (ISORC 2011), March 2011, Newport Beach, CA, USA, IEEE.
  • Compositional Timing Analysis. Amine Marref. International Conference on Embedded Computer Systems: Architectures, Modeling, and Simulation, July 2010, Samos, Greece, IEEE.
  • Predicated Worst-Case Execution-Time Analysis. Amine Marref, Guillem Bernat. Reliable Software Technologies Ada-Europe 2009, Lecture Notes in Computer Science, 2009, Volume 5570/2009, 134-148, 2009, Springer-Verlag.
  • Towards Predicated WCET Analysis. Amine Marref, Guillem Bernat. In proceedings of the 8th International Workshop on Worst-Case Execution Time (WCET) Analysis, pages 29-28, July 2008, Prague, Czech Republic, Austrian Computer Society.

Theses

  • Predicated Worst-Case Execution-Time Analysis. Amine Marref. Ph.D. thesis, August 2009, The University of York, York, United Kingdom.
  • Finding Geometric Proofs Using Logic Programming. Amine Marref. M.Eng. thesis, July 2005, The University of York, York, United Kingdom.

Teaching

I taught the courses "Data Structures and Algorithms" for bachelor students and "Software Testing" for master students at Umm Al-Qura University (UQU); in addition to the supervision of capstone projects. Before that I also worked as a teaching assistant for a number of courses at the University of York (UoY).

Taught Courses

Academic Year Semester Course Degree Venue
2013-2014 Spring Software Testing (M.S.) UQU, SA
2012-2013 Spring Data Structures and Algorithms (B.CS.) UQU, SA
2012-2013 Fall Data Structures and Algorithms (B.CS.) UQU, SA
2011-2012 Spring Data Structures and Algorithms (B.CS.) UQU, SA
2011-2012 Fall Data Structures and Algorithms (B.CS.) UQU, SA
2010-2011 Spring Data Structures and Algorithms (B.CS.) UQU, SA
2010-2011 Fall Data Structures and Algorithms (B.CS.) UQU, SA

Assisted Courses

Academic Year Semester Course Degree Venue
2008-2009 Spring Digital and Analog Design (B.Eng.) UoY, UK
2008-2009 Fall Introduction to Digital Design (B.Eng.) UoY, UK
2007-2008 Spring Digital and Analog Design (B.Eng.) UoY, UK
2007-2008 Fall Introduction to Digital Design (B.Eng.) UoY, UK
2006-2007 Spring Digital and Analog Design (B.Eng.) UoY, UK
2006-2007 Fall Introduction to Digital Design (B.Eng.) UoY, UK
2005-2006 Summer Unifying Theories of Programming (M.Eng.) UoY, UK
2005-2006 Spring Algorithms and Data Structures (B.Eng.) UoY, UK
2005-2006 Fall Chips to Systems (B.Eng.) UoY, UK

Accreditation Work

As a faculty member teaching one of the core courses in the undergraduate program in the Department of Computer Science at Umm Al-Qura University, I have significantly contributed for four years to the ABET accreditation through timely, detailed, and insightful end-of-semester reports, managing the continuous development of the teaching/learning experience at the level of the course, and at the level of its pre-requisite and post-requisite courses, and contributing to improving course, student, and program learning outcomes.

Contact

Please use the form below to get in touch with me concerning anything related to academia.

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